Heidelberg weekly meeting

Europe/Zurich
03.410 (Physikalisches Institut, Heidelberg)

03.410

Physikalisches Institut, Heidelberg

Description

For Vidyo please use room extension 10823320 or use this link.

    • 14:00 14:45
      Round Table 45m

      Reports of work progress

      Speakers: Adrian Herkert (Physikalisches Institut, Uni Heidelberg), Alena Weber (Universität Heidelberg), Andre Schoening (University Heidelberg, Institute of Physiscs), Annie Meneses Gonzalez (PhD Student), Benjamin Weinläder (PI Heidelberg), David Maximilian Immig (Universität Heidelberg), Dohun Kim (Physikalisches Institut University of Heidelberg), Frank Meier Aeschbacher (Universität Heidelberg), Heiko Augustin (PI Uni Heidelberg), Lars Noehte (PI Heidelberg), Luigi Vigani (University of Oxford), Lukas Mandok (Physikalisches Institut Heidelberg), Sebastian Dittmeier (Physikalisches Institut, Universität Heidelberg), Thomas Theodor Rudzki (Physikalisches Institut Heidelberg)

      Present: AS, SD, LN, ASch, LM, BW, TR, HA, via vidyo: AW, FM, JH, LV

      Minute-taker: HA

      --------------------------------------------------------

      AS: summarizes PSI BVR, very successful, almost everything was approved, one beamtime shifted from piM1 to piE5, 6 Weeks end of December conditionally approved (depends on Mu3e magnet status, ).
      We have to deliver! MODULE 0 ...

      AS: We need to start the preparational work NOW. Module building tools, quality assurance tools etc.

      AS: PSI pixel group is supporting, agreed to build a quad-module. A single-setup(AriaV) is already available. Support Contacts: DI, JH

      JH: Also Liverpool is planning to build quad-modules (responsible: JH). Purpose, maybe LHCb.

      AS: Many people are planning to build quad-modules. (Münstermann etc.) Synergies?

      JH: Organise HV-CMOS meeting for this topic? (Ivan)

      AS: The main difference are the time requirements, we need it now, other groups are not pressured. Maybe they want to use triggered readout, we are opting for streaming readout.
      JH sits between the projects, feel free to share information.

       

      AS: Readout of the Mu3e detector sensors is critical. Needs rigorous qualification process. Needs to be attacked now. Beat Meier is the expert.
      Foresee repeater chips on all adapter cards.

      AS: Questions?

      LN: Any information from Beat Meier concerning MuPix10 readout, motherboard, insert ...

      AS: No specific details.  They have a small scale pixel sensor readout box. Plug and Play. They know how to.

      LN: MuPix10 insert design at PSI?

      AS: no in-house! We have the experience, should go fast, with only few iterations.

      FM: Only should re-assign if capacity problem is there.

      Start of round table

      ASch: Schematic for MuPix10 probecard is basically finished, which is equivalent to the MuPix10 insert.
      Can I get a introduction to the wafer prober again, to have an eye out for practical issues.

      LV: I can do that.

      JH: We need ATLASPix3 on insert (5).

      HA: Currently not so many available. More inserts will be ordered. Maybe we can give you 1-2 during EDIT.

      JH: glue problem that was mentioned in Liverpool. Mail send to FM. Glue may degrade the silicon and thereby reduce the breakdown voltage.

      JH: Is the current-driven approach beeing submitted on the March submission?

      AS: talking to Ivan. Maybe not. unclear.

      LN: found a bug on the current flex design version, currently fixing it.

      AS: should we have an internal review? It needs to be submitted soon. As one flex qualifies the next.

      LN: there is and FLEX meeting on Wednesday.

      AS: Review is Tuesday afternoon.

      LN: Need design constrains from SwissPCB.

      AS&FM: Contact Beat, FM will send a contact at the company.

      LN: Pin assigment on the interposer?

      FM: there is a document

      LN: temperature diode status?

      AS: per half module 1 diode is readout. (~150). If one would do every half ladder (~600).
      Power grouping allows for a clever positioning.

      LN: Position which is readout clear?

      AS: on every ladder foreseen. but not all used.

      LN: needs to be clear in advance which one is choosen. un-used lines could act as antena.

      FM: you fix the level of the unused ones.

      LN: where do you do that?

      AS&FM: decision has to be made on the endpiece flex. no solderign possible

      AS: is there a routing map?

      FM: https://www.physi.uni-heidelberg.de/Forschung/he/mu3e/wiki/index.php/Cabling_task_force#Some_considerations_on_power_over_the_interposers_to_the_pixel_modules

      {Discussion}

      AS: We need an end ring mockup to see, what is possible and how many we can connect.

      Question: from which sensor do you want to read the tdiode? do you want it to be modular?

      FM: for the outer modules it should be the sensor close to the end-ring. Might be differnt for the inner layers, but it is also  a different flex. [Pulls-up presentation] for the inner it maybe be the second one.

      LN: decission is needed!

      AS&FM: we will think about it.

      AS: End-ring mockup? Beat is there, Silvan is also around. Much experience in cabeling pixel detectors at PSI.

      FM: currently silicon heater programm running which ansers some of the questions.
      Tuesday an expert(Andreas Hofer) will also be in Heidelberg.

      AS: should I approach Beat to start with the production of a 3D-printed mockup?

      AS: should Beat join in Tuesday?

      FM: You can try to convince him on short notice.

      AS: Does it make sense? Whatr is the topic?

      FM: [recites topical plan of the meeting] Fits not perfect, but is definately important?

      AS: Will write an Email.

      LM: presents powering plot. shows clock frequency vs the current  on vdd. The last point is the nominal running frequency. No dependece of vdda etc.

      AS: Cool, nice plot. Agrees with expectation. Any results from the stability study?

      LM: No breakthoughs, current topic.

      BW: Send around document on pixel layout. Skype meeting with Lorenzo tomorrow. Reply from Ivan, maybe a meeting next week. Design rule violation with bipolar transitor are solvable.

      AS: try to get detailes on planned geneva submission.

      TR: Tests with 3 chips in preparation together with Mainz. One missed capacity in vssa branch discovered, will be retested. no changes expected.

      TR: Preparations for irradiation studies of polyimide. Prepared air tight bags. Ready for irradiation next week.

      ASch: Differential signals routing again via SMA?

      SD: external clock requires SMA. clockboard. keep it that way. worked up to 12Gbit/s so far. no space issues on needle card. no harm.

      AS: we got very impressive good feedback from the BVR reviewers. Many thanks to everyone for the good work.

    • 14:45 14:55
      AOB