3–7 Jul 2011
ETH Zurich, Switzerland
Europe/Zurich timezone

Modular High Bandwidth Data Acquisition System with Gigabit and 10 Gigabit Ethernet Uplinks

5 Jul 2011, 10:10
1m
HG E7 (ETH Zurich, Switzerland)

HG E7

ETH Zurich, Switzerland

www.ethz.ch www.psi.ch
Poster presentation Front-end Electronics and Readout Poster Mini Talks IV

Speaker

Gerd Theidel (PSI)

Description

The data acquisition (DAQ) system was designed to capture incoming data at a rate of 25.2 Gbit/s per half-module and send them to a storage system over standard Ethernet connections. It consists mainly of a customizable front-end board (FEB) for data preprocessing and a back-end board for buffering up to 8 Gbyte of data before transmitting them to the storage system. Small form-factor pluggable (SFP) and SFP+ modules allow the use of optical fibers or copper cables covering a data rate from 10 Mbit to 10 Gbit. A Linux operating system running on a PowerPC Processor inside the FPGA is used for handling slow control and system monitoring tasks as well as in the field upgrades of all programmable system components over the Ethernet connection. The system is now in the commissioning phase to read out the EIGER X-ray detection chip developed at the Paul Scherrer Institut (PSI). With adaption of the FEB it is possible to use this DAQ system for many other tasks.

Primary authors

Mr Elmar Schmid (Paul Scherrer Institute) Gerd Theidel (PSI)

Presentation materials