3–7 Jul 2011
ETH Zurich, Switzerland
Europe/Zurich timezone

Analasis of CMOS APD with Geiger mode

4 Jul 2011, 12:34
1m
HG E7 (ETH Zurich, Switzerland)

HG E7

ETH Zurich, Switzerland

www.ethz.ch www.psi.ch
Poster presentation Sensor Materials, Device Processing & Technologies Poster MiniTalks I

Speaker

Mr Hyun Tae Leem (CMOS APD)

Description

Because of enhancive integration and advantageous characteristic of high speed and low power dissipation, research on CMOS Geiger mode APD is actively conducted. However, APD fabricated through CMOS process demands higher efficiency of fill factor and modification of interfering noise. Therefore, the study is conducted to derive optimum size of CMOS APD by comparison and analysis of characteristics between P+/N structure APD pixel type 0(fill factor 23.23%) and APD pixel type 1(fill factor 17.46%). The shapes of open PDs and pixels of the two CMOS APDs are same as square. However the sizes are different from each other, pixel type 1 is 83.3um x 83.3um, and the other is 67um x 67um. The area of open PDs are set as 40.6um x 40.6um and 28um x 28um for pixel type 0 and pixel type 1 respectively. Main body of CMOS APD consists of arrays of pixel type 1. We tested Dark Current, Photocurrent, Quantum Efficiency, Dead Time, Gain, Dark Count Rate to analyze the characteristics of the CMOS APDs in this research. We also tested and analyzed the Photon Count Measurement of main body of 8 x 1-array-CMOS-APD with Geiger mode through sequential mode. The result of the study will be announced in detail.

Primary author

Prof. Kwang Hyun Kim (CMOS APD)

Co-authors

Mr Hyun Tae Leem (CMOS APD) Dr Yong Hyun Chung (CMOS APD)

Presentation materials