Mu3e integration meeting
19 Jun 2018, 13:00
→
20 Jun 2018, 19:00
Europe/Zurich
Université de Genève
Université de Genève
24, Quai Ernest-Ansermet, CH-1211 Genève 4
Allessandro Bravar
(
Geneva
)
,
Frank Meier Aeschbacher
(
Universität Heidelberg
)
Description
This is a mini-workshop on integration aspects of Mu3e:
Electrical aspects: readout, powering, HV etc
Mechanical aspects: does everything fit together? doe we find the space for all the electronics?
A special session for the scintillatior detectors will be on Wed covering the MuTRiG and its next version.
Tuesday, 19 June
Tue, 19 Jun
Wed, 20 Jun
14:00
→
17:25
Electronics integration
14:00
Welcome
10m
14:10
Integration status
20m
Speaker
:
Silvan Streuli
(
Paul Scherrer Institut
)
Slides
14:30
Powering status
20m
Should cover power boards, HV boards and also to the outside power supplies
Speaker
:
Dr
Dirk Wiedner
(
Physikalisches Institut der Universitaet Heidelberg
)
Slides
14:50
Frontend board status
20m
Speaker
:
Dr
Dirk Wiedner
(
Physikalisches Institut der Universitaet Heidelberg
)
Slides
15:10
Power cabling inside detector
20m
Mainly covered by Silvan's integration talk, hence no slides
15:30
Readout cables inside detector
20m
Speakers
:
Beat Meier
(
Paul Scherrer Institut
)
,
Dr
Dirk Wiedner
(
Physikalisches Institut der Universitaet Heidelberg
)
,
Sebastian Dittmeier
(
Physikalisches Institut, Universität Heidelberg
)
Paper
Slides
15:50
SciFi boards status
20m
Speaker
:
Dr
Allessandro Bravar
(
Geneva
)
16:10
SciTile boards status
20m
Speakers
:
Mr
Konrad Briggl
(
KIP Uni Heidelberg
)
,
Dr
Yonathan Munwes
(
KIP Heidelberg University
)
Slides
16:30
Pixel boards status
20m
16:55
Discussion, wrap-up, next steps
30m
18:00
→
21:00
Dinner
Wednesday, 20 June
Tue, 19 Jun
Wed, 20 Jun
09:00
→
12:00
Detector integration
09:15
Welcome
5m
09:20
SciFi integration status
20m
Slides
09:40
SciTile integration status
20m
Speakers
:
Mr
Konrad Briggl
(
KIP Uni Heidelberg
)
,
Dr
Yonathan Munwes
(
KIP Heidelberg University
)
10:00
Pixel vertex layers status
20m
Speaker
:
Frank Meier Aeschbacher
(
Universität Heidelberg
)
Slides
10:20
Pixel recurl layers status
20m
Speaker
:
Prof.
Joost Vossebeld
(
University of Liverpool
)
Slides
10:40
Integration discussion
30m
11:10
Wrap-up
10m
13:30
→
16:00
MuTRiG
13:30
Welcome
10m
13:40
MuTRiG status
20m
Speaker
:
Dr
Wei Shen
(
KIP Uni Heidelberg
)
Slides
14:00
SciFi needs
15m
Speaker
:
Dr
Allessandro Bravar
(
Geneva
)
14:15
SciTile needs
15m
Speakers
:
Mr
Konrad Briggl
(
KIP Uni Heidelberg
)
,
Dr
Yonathan Munwes
(
KIP Heidelberg University
)
14:30
Towards next chip submission
20m