Mu3e integration meeting

19 Jun 2018, 13:00 → 20 Jun 2018, 19:00 Europe/Zurich

Université de Genève

Allessandro Bravar (Geneva), Frank Meier Aeschbacher (Universität Heidelberg)

This is a mini-workshop on integration aspects of Mu3e:

• Electrical aspects: readout, powering, HV etc
• Mechanical aspects: does everything fit together? doe we find the space for all the electronics?

A special session for the scintillatior detectors will be on Wed covering the MuTRiG and its next version.

Tuesday, 19 June

14:00 → 17:25 Electronics integration

14:00 Welcome

14:10 Integration status

Speaker: Silvan Streuli (Paul Scherrer Institut)

Slides Mu3e-Integration.pdf

14:30 Powering status

Should cover power boards, HV boards and also to the outside power supplies

Speaker: Dr Dirk Wiedner (Physikalisches Institut der Universitaet Heidelberg)

Slides LowVoltageGenerationV0.pdf

14:50 Frontend board status

Speaker: Dr Dirk Wiedner (Physikalisches Institut der Universitaet Heidelberg)

Slides Frontend_board_status_June2018V4.pdf Frontend_board_status_June2018V4.pptx

15:10 Power cabling inside detector

Mainly covered by Silvan's integration talk, hence no slides

15:30 Readout cables inside detector

Speakers: Beat Meier (Paul Scherrer Institut), Dr Dirk Wiedner (Physikalisches Institut der Universitaet Heidelberg), Sebastian Dittmeier (Physikalisches Institut, Universität Heidelberg)

Paper Bandwidths of Micro Twisted-Pair Cables and Fusion Spliced SIMMGRIN Fiber

Slides 20180619_Mu3e_Meeting_Beat_Meier.pdf

15:50 SciFi boards status

Speaker: Dr Allessandro Bravar (Geneva)

16:10 SciTile boards status

Speakers: Mr Konrad Briggl (KIP Uni Heidelberg), Dr Yonathan Munwes (KIP Heidelberg University)

Slides tilesIntegrationWS.pdf

16:30 Pixel boards status

16:55 Discussion, wrap-up, next steps

18:00 → 21:00 Dinner

Wednesday, 20 June

09:00 → 12:00 Detector integration

09:15 Welcome

09:20 SciFi integration status

Slides MuTRigMeetingGenf20062018Ver2.pdf

09:40 SciTile integration status

Speakers: Mr Konrad Briggl (KIP Uni Heidelberg), Dr Yonathan Munwes (KIP Heidelberg University)

10:00 Pixel vertex layers status

Speaker: Frank Meier Aeschbacher (Universität Heidelberg)

Slides praesMu3eIntPxBoards180619.pdf

10:20 Pixel recurl layers status

Speaker: Prof. Joost Vossebeld (University of Liverpool)

Slides vossebeld

10:40 Integration discussion

11:10 Wrap-up

13:30 → 16:00 MuTRiG

13:30 Welcome

13:40 MuTRiG status

Speaker: Dr Wei Shen (KIP Uni Heidelberg)

Slides MuTRiG_integration_meeting.pdf

14:00 SciFi needs

Speaker: Dr Allessandro Bravar (Geneva)

14:15 SciTile needs

Speakers: Mr Konrad Briggl (KIP Uni Heidelberg), Dr Yonathan Munwes (KIP Heidelberg University)

14:30 Towards next chip submission